The idea for this blog post is to present a strong case for Si-Spin Qubits as a viable candidate for long-term circuit-based model for quantum computing. There are many factual information presented with respect to Spin Qubits.

For a technology to be accepted as capable of performing quantum computation, it must satisfy the

The Spin-qubits can prove advantageous because:

1. The standard gate time in case of Spin-Qubits is within 10s of ns while the qubit decoherence time is usually between 100s of micro-seconds (which is nearly an eternity in quantum word). Decoherence is caused by electron's interaction with nuclear spin of the Si/SiGe substrate. Changing the substrate can allow further longer decoherence times up to 10s of Milli-seconds.

2. The Spin-qubits are one of the most promising candidates for long-term 'scalable' quantum computing. One-qubit occupies very less area on chip (70nm × 70nm). These can be arranged in arrays and has potential to scale to millions of qubits for universal quantum computing (1 billion qubits in 1cm × 1 cm chip area).

3.Typically the spin-qubits are operated at temperatures of 10mK, but it has the potential to be operated at 1K to 4K. This is a very important point as classical CMOS can also be used at temperatures up to 4K which would allow manufacturing (in future) classical control and quantum-dot array units to be fabricated on the same silicon die, thus, eliminating complicated wiring for controlling these qubits (True Quantum Integrated Circuits). These cryo-electronics would have to be faster, less noisy and must have very low power dissipation.

4. Manufacturability of Spin-qubits is an important criteria. The current manufacturing is done by 300mm technology, which is an already perfected technology (such as, by Intel).

It is however, also important to remember that current quantum computing technologies are prone to high error rates and qubit decoherence. While the error-rates in spin-qubits are better than superconducting qubits; for the Spin-Qubit processor to function as a NISQ-era (Noisy Intermediate Scale Quantum) device (without quantum error correction); gate single-qubit gate error rates up to 10^(-5) or better (which currently, is not possible).

The above points seem very promising, but there are important problems that lie ahead:

1. Fabrication is an imperfect process and qubits are very sensitive. The Spin-qubit model involves tunneling a single electron into a quantum dot by applying gate-voltage and manipulation of the electron by means of AC pulses. Fabrication would not be perfect hence, these gate-voltages (to control electro-chemical potential) would vary for different qubits. Uniformity is essential. Further, the current research Spin-qubits are arranged linearly, which allow qubit mapping, only with it's neighboring qubits. The next steps (for next 2-5 years) would be arranging the same as a 2D arrays for better mapping; to allow better execution of quantum algorithms

2. Scalable control is perhaps one of the most important considerations for actually using a qubit. It is shown that 40+ connection lines is required for using a Si-Spin 5-qubit chip, among which 14 are high-bandwidth (fast signal) connections. At this scaling rate, the number of classical control channels required to use qubits would explode. This is absolutely undesirable and is thus, the issue addressed in this blog, in part 2.

For a technology to be accepted as capable of performing quantum computation, it must satisfy the

**Di-Vincenzo's Criteria**i.e. it must be/have:- A scalable physical system with well characterized qubits.
- The ability to initialize the states of the qubits to a simple state, such as |000⟩.
- Long relevant coherence times, much longer than the gate operation time.
- A “universal” set of quantum gates.
- A qubit-specific measurement capability.

The Spin-qubits can prove advantageous because:

1. The standard gate time in case of Spin-Qubits is within 10s of ns while the qubit decoherence time is usually between 100s of micro-seconds (which is nearly an eternity in quantum word). Decoherence is caused by electron's interaction with nuclear spin of the Si/SiGe substrate. Changing the substrate can allow further longer decoherence times up to 10s of Milli-seconds.

2. The Spin-qubits are one of the most promising candidates for long-term 'scalable' quantum computing. One-qubit occupies very less area on chip (70nm × 70nm). These can be arranged in arrays and has potential to scale to millions of qubits for universal quantum computing (1 billion qubits in 1cm × 1 cm chip area).

3.Typically the spin-qubits are operated at temperatures of 10mK, but it has the potential to be operated at 1K to 4K. This is a very important point as classical CMOS can also be used at temperatures up to 4K which would allow manufacturing (in future) classical control and quantum-dot array units to be fabricated on the same silicon die, thus, eliminating complicated wiring for controlling these qubits (True Quantum Integrated Circuits). These cryo-electronics would have to be faster, less noisy and must have very low power dissipation.

4. Manufacturability of Spin-qubits is an important criteria. The current manufacturing is done by 300mm technology, which is an already perfected technology (such as, by Intel).

It is however, also important to remember that current quantum computing technologies are prone to high error rates and qubit decoherence. While the error-rates in spin-qubits are better than superconducting qubits; for the Spin-Qubit processor to function as a NISQ-era (Noisy Intermediate Scale Quantum) device (without quantum error correction); gate single-qubit gate error rates up to 10^(-5) or better (which currently, is not possible).

The above points seem very promising, but there are important problems that lie ahead:

1. Fabrication is an imperfect process and qubits are very sensitive. The Spin-qubit model involves tunneling a single electron into a quantum dot by applying gate-voltage and manipulation of the electron by means of AC pulses. Fabrication would not be perfect hence, these gate-voltages (to control electro-chemical potential) would vary for different qubits. Uniformity is essential. Further, the current research Spin-qubits are arranged linearly, which allow qubit mapping, only with it's neighboring qubits. The next steps (for next 2-5 years) would be arranging the same as a 2D arrays for better mapping; to allow better execution of quantum algorithms

2. Scalable control is perhaps one of the most important considerations for actually using a qubit. It is shown that 40+ connection lines is required for using a Si-Spin 5-qubit chip, among which 14 are high-bandwidth (fast signal) connections. At this scaling rate, the number of classical control channels required to use qubits would explode. This is absolutely undesirable and is thus, the issue addressed in this blog, in part 2.